Analysis of the influence of fixed-point computing on quantization noise in software DDC


  • N. P. Pavlenko National Technical University of Ukraine, Kyiv Politechnic Institute, Kiev, Ukraine



SDR, FPGA, SDDC, PSD, quantization noise


Introduction. With the development of digital technology more attention is paid to making radio-receiving tracks based on SDR technology (Software Defined Radio), which is based on the processing of digitalized radio-frequency signals exclusively by means of software in real time. Moreover the construction ofdata-acquisition systems on one integral chip (SoC) is widely used right now. The main fundamental basis of SoC systems is the FieldProgrammable Gate Array (FPGA). One important step of receiving of radio-frequency signals is a digital down conversion, followed by filtration and repeated decimation. Since processing in DDC is made in a fixed calculation format, than before the immediate implementation of this structure on FPGA, it is necessary to analyze the effect offixed calculation bits on the quality of signal processing. Later it can be used to choose DDC internal calculation bits without sacrificing the set quality of signal processing and hardware resources on its implementation. In the well-known papers, analysis of the effect of signal quantization is reduced to two methods: deterministic and probability methods. Deterministic method gives the top-ofthe-line evaluation of quantizing noise at the output of digital system. Probability method is based on evaluation of quantizing noise dispersion at the output of the device. Evaluation of the signal and the quantization noise in the SDDC based on their PSD. In this section, mathematical expressions were obtained for the construction of PSD signal and the quantizing noise at the output of each of the subsystems of the digital DDC. Criterion for selecting SDDC bit is the relative level of PSD quantizing noise at the output of the digital system. Since the ADC is fixed, the choice of bit computing in SDDC should be such that the total quantizing noise in SDDC would not exceed the ADC quantizing noise at the output of the digital system. Example calculation and construction of PSD signal and quantization noise in Matlab for reception QPSK-signal. In this part of the article an example of the analysis of DDC structure for receiving QPSK- signal was considered. Mathematical Matlab's model has been developed which allows to calculate the PSD of the signal and the quantization noise depending on the internal structure of the SDDC bit based on the formulas of section 2 this paper. These expressions make it possible to construct a PSD noise separately from each SDDC source output, and separately estimate the contribution of each source of quantizing noise to the total noise at the output of the digital system. From these results a decision on the choice of a particular quantization step that depends on the selected calculating bit at each stage of processing was made. Conclusions. Quantizing noise dispersion is not an adequate quality evaluation of processing in multi-stage and multi-rate systems, which include software DDC under review. In such systems the sequential changes of the line, as well as the nature of the spectrum of interfering components, including quantization noise, happen. Therefore in this paper I propose a different approach based on the calculation of the power spectral density (PSD) of the quantizing noise at the output of the device, taking into account the filtering effect of all of its stages and repeated decimation.

Author Biography

N. P. Pavlenko, National Technical University of Ukraine, Kyiv Politechnic Institute, Kiev

Pavlenko N.P., Postgraduate student





Radio Circuits and Signals